Raja Koduri Teases again High-Performance Intel GPU- Develops Daddy of all GPU

Raja Koduri, the chief of architect at Intel does not shy away from teasing Intel’s new endeavour at making dedicated GPU called “Xe”. He teased the 2020 timeline of launching the GPU by posting a cryptic tweet and now has teased a milestone of designing biggest higher performance GPU which they claim is “baap of all” (father of all) GPU.

As per the tweet, Raja is teasing not any ordinary GPU but a high performance part and thus the “Xe HP” moniker.

Raja also states that this is the largest silicon designed in India and stands well against large silicon designed around the world.

So will this launch in 2020 as teased by Raja earlier? We doubt that is the case as the initial GPU launch is expected to be of the lower segment. Further how much this is related to Ponte Vecchio, which is an HPC focused GPU. Considering the size hint, this might very well be the case.

The Xe architecture will be a single base architecture that will cover which will be scaled for different segments like HPC, gaming, workstation, etc. For example in mobile segment, the GPU can be stripped to a minimum due to power constraints, HPC can get double precision, AI can be enabled in workstation, gaming GPU can get ray tracing cores etc.

The HPC GPU will get trio of feature to enable leadership performance:

1. Flexible data-parallel vector matrix engine for AI acceleration 
2. High double precision (FP64) throughput
3. High cache and memory bandwidth

The first output of the above set of features is “Ponte Vecchio”. This is GPU will have

1. An exascale GPU design
2. Manufactured at 7nm sporting 2x density from 10nm
3. Chiplet Technology (MCM design): Ponte Vecchio will use 16 compute chiplet. This is similar to what Nvidia will be aiming with Hopper GPU.
4. Foveros and EMIB technology to join chiplets: Forveros technology to interconnect with the Rambo cache which would be shared across several other Xe HPC GPUs. EMIB would be used to connect the HBM memory with the GPUs.
5. GPU with GPU will be connected using Compute eXpress Link (CXL) utilising PCIe 5.0 lanes.

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Abhishek is a Finance Professional and has worked in multiple MNCs. However, he is also an avid tech reader and tinkerer with over 20 years of experience. His passions include 3D animation and drawing Illustrations. His creations can be viewed at www.artstation.com/abhifx

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